INCEP™ Technologies and Molex Incorporated Announce Relationship

Both INCEP and Molex are Partnering in a strategic “Direct Power to the Processor” Program

INCEP Technologies, Inc. and Molex Incorporated announced a program which has involved the development of a new power delivery technology for microprocessors. This technology will address the most challenging power requirements well into the 2010 timeframe.

Microprocessor silicon technology is upholding Moore’s Law with forecasted densities well over one billion transistors by 2010 along with processing speeds above 15 GHz. Advances in silicon processes are supporting this technology roadmap. However, these advances do not come without a cost. With the increasing density and speed comes increasing supply currents and shrinking margins in supply noise, which places an enormous burden on the circuits that provide power to the chip.

INCEP’s core expertise in power delivery and chip packaging coupled with Molex’s world-class position in interconnect technology and advanced thermal solutions is being viewed as a very powerful mix.

The two companies are working with other industry leaders in an effort to commercialize a new package for microprocessors, which combines the microprocessor die and its chip-carrier substrates with the microprocessor’s power conditioning circuitry; a single, combined microprocessor and power supply heat dissipating device; and a retention solution. The application of power to the surface of a microprocessor package requires a modification to the microprocessor substrate to incorporate power and ground pads, and then a module which drives the power. This assembly is referred to as the Z-VRM™ (Z-axis Voltage Regulation Module). Application of surface power delivery in the telecommunications industry involves a module which is referred to as the Z-Brick™.

“When we found that INCEP had a similar strategic program focused on ‘Power to the Processor’, it made sense that we talked”, said Tom Lee, VP of New Business Development at Molex. “It then became immediately apparent that our combined efforts would lead to a faster time to market with a much superior product.”

Based on segmenting power delivery from I/O signal routing, the solution delivers power to the surface of the processor substrate from a voltage regulator mounted over the device through a high efficiency interconnection system. This power and signal segmentation approach reduces processor package pin densities by 30%-50%, supports the most demanding transient power requirements, frees up critical motherboard real estate, and offers cost savings opportunities of over 20% to both processor vendors and OEMs.

“It’s no longer a secret that many of these high-performance semiconductor vendors are up against the wall. The very large DC and AC currents flowing in the interconnect between the point of load voltage regulation and the CPU are now causing board, socket, and CPU package reliability issues. The industry is also heading for a cliff in 2005”, said Jim Kaskade, CEO and co-founder of INCEP. “We believe that our combined efforts and our combined technologies will provide the necessary relief that CPU vendors seek now and through 2010. It’s only a matter of time before the Z-VRM and later Z-Brick will become a standard for all high-power and high-performance devices.”

The two companies plan on having prototype samples of their joint development efforts for customers by the first quarter of 2003. Their intent is to be in a position to support commercial use by as early as the fourth quarter of 2003 or when device vendors are ready to launch products which incorporate their Direct Power To The Processor technology.

Jim Kaskade

Jim Kaskade is a serial entrepreneur & enterprise software executive of over 36 years. He is the CEO of Conversica, a leader in Augmented Workforce solutions that help clients attract, acquire, and grow end-customers. He most recently successfully exited a PE-backed SaaS company, Janrain, in the digital identity security space. Prior to identity, he led a digital application business of over 7,000 people ($1B). Prior to that he led a big data & analytics business of over 1,000 ($250M). He was the CEO of a Big Data Cloud company ($50M); was an EIR at PARC (the Bell Labs of Silicon Valley) which resulted in a spinout of an AML AI company; led two separate private cloud software startups; founded of one of the most advanced digital video SaaS companies delivering online and wireless solutions to over 10,000 enterprises; and was involved with three semiconductor startups (two of which he founded, one of which he sold). He started his career engineering massively parallel processing datacenter applications. Jim has an Electrical and Computer Science Engineering degree from University of California, Santa Barbara, with an emphasis in semiconductor design and computer science; and an MBA from the University of San Diego with an emphasis in entrepreneurship and finance.